An aperture ratio is given by the ratio of the area for light transmission of a pixel to the total area of the pixel. The quality of an image is enhanced in proportion to increase in the aperture ratio. Accordingly, one can enlarge the proportion of the area of the pixel electrode to the total pixel area to increase the aperture ratio.
FIGS. 1A, 1B and 1C show a liquid crystal display having a top gate structure according to a conventional art. FIG. 1A is a top view of the conventional liquid crystal display, and FIGS. 1B and 1C are cross-sectional views respectively taken along the lines AA' and BB' in FIG. 1A.
Referring to FIG. 1A, a data line 13L intersects a gate line 17L on an insulating substrate. The data line 13L extends to a source electrode 13S. The source electrode 13S is on the opposite side of a drain electrode 13D formed from the same material as the data line 13L. The gate line 17L connects to a gate electrode 17 lying over and overlapping the source and drain electrodes 13S and 13D and an active layer 15, thereby forming a switching device. The drain electrode 13D is connected to a pixel electrode 12.
As shown in FIG. 1B, a light shielding layer 11 is formed on the insulating substrate 100 and an insulating layer 110 covers the whole surface. On the insulating layer 110, the source electrode extended from the data line 13L and the drain electrode 13D being opposite side of the source electrode 13S is formed. The pixel electrode 12 is in contact with the drain electrode 13D and positioned on the same layer with the data line 13L. On the source and drain electrodes 13S and 13D, the active layer 15, gate insulating layer 16 and gate electrode 17 are formed in the same pattern. A reference numeral 14 indicates an ohmic contact layer formed of a doped semiconductor.
Referring to FIG. 1C, the insulating layer 110 is formed on the insulating substrate 100, and the data line 13L and the pixel electrode 12 are formed thereon. The data line 13L and the pixel electrode 12 are spaced from each other at a designated distance on the same layer.
FIGS. 2A to 2D are sectional views taken along the lines AA' and BB' in FIG. 1A, illustrating a process for fabricating the conventional liquid crystal display.
As shown in FIG. 2A, a metal layer consisting of Cr or the like is formed on the insulating substrate 100 and etched by photolithography to pattern a light shielding layer 11. An insulating layer 110 is formed by depositing an insulating material such as silicon oxide or silicon nitride.
As shown in FIG. 2B, a transparent conductive layer is formed on the insulating layer 100 and etched by photolithography to pattern the pixel electrode 12.
Referring to FIG. 2C, a metal layer consisting of Al or the like and a doped amorphous silicon layer (i.e., the ohmic contact layer) are sequentially formed on the whole surface and etched by photolithography to pattern a data line 13L, a source electrode 13S and a drain electrodes 13D. As a result, a portion of the doped amorphous silicon layer 14' remains on the respective metal patterns (the data line 13L, the source electrode 13S and the drain electrodes 13D). The data line 13L must be formed at a designated distance from the pixel electrode 12 on the same layer to prevent a short circuit due to overlapping the pixel electrode 12.
In FIG. 2D, an amorphous silicon layer, an insulating layer consisting of silicon oxide layer or silicon nitride, and a metal layer consisting of Cr or the like are sequentially formed on the whole surface, and etched by way of photolithography to form an active layer 15, a gate insulating layer 16 and a gate electrode 17. The remaining doped amorphous silicon layer 14' is simultaneously etched to form an ohmic contact layer 14 on the source and drain electrodes 13S and 13D that are in contact with the active layer 15.
As described above, a short circuit may occur in a conventional liquid crystal display because the pixel electrode lies on the same layer with the data line. To avoid the short circuit, the pixel electrode and data line must be spaced from each other by a designated distance, which reduces the area of the pixel electrode and thereby deteriorates the aperture ratio.
In the conventional art FIG. 2C and 2D, the doped amorphous silicon layer 14' lies on the top of the source and drain electrode 13S and 13D, and the pixel electrode 12 is exposed. When the layer 14' is etched by photolithography, the pixel electrode is damaged by etchant of etching the layer 14'.